Renegotiating Accelerator Abstractions Workshop

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1st Annual Workshop

Register Interest in Attending/PresentingGoogle Forms Link

Program

Date: 16th September 2019.

Workshop Program

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Time Session Speaker Title
1100 - 1230
(25-min sessions)
Intro + Big Picture Welcome (5-min) - Tony Nowatzki (UCLA)
Intro (10-min) - Matt Horsnell (Arm)
Sarita Adve (UIUC)
Vikram Adve (UIUC) HPVM: A Uniform Interface and Abstraction for Heterogeneous Parallel Systems
Arrvindh Shriraman (SFU)
1230 - 1400 Lunch Break
1400 - 1530
(22-min sessions)
DSLs, Compilers, & IRs Thierry Moreau (UoWashington) The Past, Present and Future of Deep Learning Acceleration Stacks.
Riyadh Baghdadi (MIT) Tiramisu: A Polyhedral Compiler for Dense and Sparse Deep Learning and More
Jeff Setter (Stanford) Halide to Hardware: Exploring accelerators using software languages
Naums Mogers (UoEdinburgh) Functional Interface for Performance Portability on Parallel Accelerators
1530 - 1600 Break
1600 - 1650
(25-min sessions)
Programmable Accelerators Aviral Shrivastava (ASU) dMazeRunner: Accelerate perfectly nested loops on dataflow accelerators /td> </tr>
Ramana Radhakrishnan (Arm)
1650 - 1730 Panel Sarita Adve, Vikram Adve, Arrvindh Shriraman, Riyadh Baghdadi Panel Moderator - David Weaver (Arm)